A research group from the University of Tokyo, NTT, the RIKEN Institute, Kyushu University, and the Japan Science and Technology Agency (JST) proposed a new quantum computer architecture that separates memory and processors. This design is highly versatile and portable, and is said to be able to reduce the scale of required hardware by about 40% while limiting the increase in calculation time to about 3% in practical quantum computing.
In this study, by proposing a new quantum memory method, it was shown that a memory efficiency of about 90% can be achieved even in practical cases. In addition, the increase in calculation time was suppressed by introducing a cache structure that takes advantage of the locality of memory access and a mechanism to hide communication delays.
Research positioning (Provided by NTT)
Conventional quantum computers are dominated by the “quantum circuit type,” which stores all quantum data in a computable register area and executes programs using logic circuits called quantum circuits. However, this method has the drawbacks that the size of the computer tends to become large, and because programs are optimized specifically for a specific computer, it is difficult to port them to different computers.
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In particular, in error-tolerant quantum computing, the mainstream method is to use quantum bits arranged two-dimensionally, but in conventional designs, it is necessary to place a calculation support cell adjacent to each cell used to store data, which poses the problem of low memory utilization efficiency. Fault-tolerant quantum computing is quantum computing that performs calculations while correcting errors so that errors caused by noise on the quantum bits do not occur during the calculation. It is said to be an essential technology for practical quantum computing.
To solve these problems, the research group attempted to apply the “load-store” architecture, which is standard in modern computers, to quantum computers. In the load-store architecture, a computer is divided into memory and a processor, and calculations are performed while exchanging data.
In this method, data movement is handled by abstract commands called “load” and “store,” making it possible to build highly portable programs that are not dependent on the specific structure of the processor or memory. In addition, since memory can be specialized for data storage, high memory utilization efficiency can be expected.
The research group plans to further optimize the proposed architecture and conduct demonstration experiments in the future. They also plan to develop higher-level technologies, such as programming languages and compilation optimization, in order to accelerate the practical application of quantum computers.
SOURCE: Zdnet
