Synopsys Fusion Design Platform Enables Full-Flow Quality-of-Results and Fastest Design Convergence on Samsung Advanced Process Technology.
Highlights:
- Synopsys and Samsung have collaborated on the enablement of Fusion Design Platform to unleash the benefits of Samsung’s most advanced process nodes
- Certified flow provides designers a complete suite of industry-leading digital implementation and signoff solutions for timing and extraction
- Synopsys Fusion Design Platform accelerates the delivery of high-performance compute designs with the industry’s best quality of results and turnaround time
Synopsys, Inc. today announced its collaboration with Samsung Foundry to deliver a new certified digital implementation, timing and physical signoff reference flow accelerating high-performance compute (HPC) designs using the Synopsys Fusion Design Platform™. With the certified reference flow, designers can achieve accelerated productivity through automated features and integrations in the platform, providing a clear path to meet their design objectives on Samsung’s advanced process nodes.
As part of the platform, Design Compiler® NXT, IC Compiler™ II and Fusion Compiler™ solutions have been enhanced with new innovative features allowing mutual customers to leverage Samsung advance process technologies and achieve the best power, performance and area (PPA) metrics while delivering a faster turnaround time on their designs. By leveraging the fusion of StarRC™ signoff extraction and PrimeTime® signoff delay calculation engine in the platform, the HPC reference flow delivers predictable and convergent design closure with a zero-margin flow and maximizes PPA gains available through Samsung’s advanced process technology.
“There is an increasing demand from our mutual customers for a certified reference flow for HPC designs on our advance processes,” said Sangyun Kim, vice president of Foundry Design Technology Team at Samsung Electronics. “Our extensive collaboration with Synopsys has enabled the digital implementation and signoff reference flow for HPCs utilizing the latest technologies from the Fusion Design Platform to deliver predictable and quality flows for our advanced process nodes.”
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Next-generation HPC designs have aggressive clock target frequencies, stringent power requirements, high utilization goals and require support for the most advanced process geometries. Synopsys’ Fusion Design Platform offers innovative features to address these challenges such as concurrent clock and data optimization, signoff and exhaustive path-based timing analysis, multi-source clock tree synthesis, hash via support, freeform macro placement, and Machine Learning technologies for the next wave of HPC designs. The HPC reference flow provides a comprehensive methodology and includes a full set of documented flows and design examples validated by Samsung Foundry and Synopsys.
“Our early collaboration with Samsung Foundry has enabled our mutual customers to leverage our advanced technologies and solutions’ on Samsung’s most advanced process technologies,” said Charles Matar, senior vice president of System Solutions and Ecosystem Enablement, Design Group at Synopsys. “The advanced capabilities within the Synopsys Fusion Design Platform deliver the quality of results and time-to-result advantages that will enable our mutual customers to differentiate their high-performance compute designs.”
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Synopsys experts will discuss new features within the reference flow for HPC design optimized for Samsung Foundry’s advanced processes at the upcoming at the upcoming Samsung Advanced Foundry Ecosystem (SAFE) Forum on October 28. For more information about the Synopsys Fusion Design Platform, visit https://www.synopsys.com/implementation-and-signoff/fusion-design-platform.html.
