Kioxia Corporation and Western Digital Corp. (NASDAQ: WDC) today announced that they have developed their sixth-generation, 162-layer 3D flash memory technology. This most advanced and highest density 3D flash memory technology to date marks the next milestone in the companies’ joint venture partnership, established 20 years ago, and implements a range of technological innovations and manufacturing.
“Through their strong two-decade partnership, Kioxia and Western Digital have successfully created unparalleled manufacturing and R&D capabilities,” said Masaki Momodomi, Chief Technology Officer, Kioxia. “Together, we produce over 30% of the world’s flash memory bits, and remain steadfast in our mission of delivering exceptional capacity, performance and reliability at attractive cost. We each deliver this value proposition across a range of data-centric applications, from consumer electronics to data centers, to emerging applications made possible by 5G networks, artificial intelligence and autonomous systems. ”
Beyond vertical scalability, the new architecture exploits new innovations
“As Moore’s Law reaches its physical limits in the semiconductor industry, there is one area where Moore’s Law remains relevant: flash memory,” said Dr. Siva Sivaram, president of Technology. and strategy, at Western Digital. “To continue these advancements and meet the growing global demand for data, a new approach to 3D flash memory scalability is essential.
With this new generation, Kioxia and Western Digital introduce innovations in vertical and lateral extensibility to improve capacity in a smaller mold size with a lower number of layers. This innovation ultimately delivers the performance, reliability and price that customers need. ”
This sixth generation 3D flash memory features state-of-the-art architecture beyond the conventional 8-level hole array, and features 10% higher side cell density than fifth generation technology.
This advancement in lateral extensibility, combined with the 162 layers of vertical stacked memory allows a 40% reduction in mold size, compared to 112 layer stacking technology, which optimizes costs.
The Kioxia and Western Digital teams also applied Circuit Under Array CMOS placement and four-plane operation, which together provides an almost 2.4-fold improvement in programming performance and a 10% improvement in programming performance. read latency compared to the previous generation. I / O performance is also improved by 66%, allowing the next generation interface to meet the ever increasing need for faster transfer rates.
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Overall, this new 3D flash memory technology reduces cost per bit and increases bits per wafer by 70%, compared to the previous generation. Kioxia and Western Digital continue to drive innovation that enables continuous scalability to meet the needs of customers and their diverse applications.
The companies made an in-depth joint presentation of the related innovations during the ISSCC 2021 conference later today .